1. Field of the Invention
The present invention generally relates to the manufacture and testing of electronic circuit modules which include a plurality of integrated semiconductor chips and, more particularly, to the testing of modular circuit structures during the course of manufacture and within an automated manufacturing line.
2. Description of the Prior Art
It has long been recognized that high density of integration of electronic circuits on semiconductor chips yields substantial economy of manufacture so long as manufacturing yield can be maintained since many more electronic elements can be formed and connected during the necessary process steps. At the same time, performance improvements are realized since connections of reduced length have reduced capacitance and accordingly reduced signal propagation time and susceptibility to electrical noise. The same economies and performance improvements accrue to arrangements for connecting multiple chips for the same reasons.
In order to realize such advantages in arrangements for connecting plural integrated circuit chips, so-called multi-layer modular (MLM) packages have been developed in recent years. Such packages are, at the present time, generally rectangular and between 40 mm and 125 mm on a side and can accommodate from as few as two to several hundred chips. These packages are comprised of a plurality of lamina, each having a pattern of connections formed thereon and providing apertures known as vias which are filled or lined with metal or conductive paste or other conductive material such as plated metal to provide connections from one layer of conductive pattern to another. These lamina carrying conductive patterns and vias are aligned with each other in a stack and bonded together (e.g. by sintering if the lamina are ceramic, thermoplastic bonding if of polyimide and the like in accordance with the material of the lamina) to form a mechanically robust network of finely spaced connections embedded in a solid body of material, referred to thereafter as a substrate.
For numerous manufacturing reasons, vias and conductors on or in the substrate are generally provided at a pitch which is significantly larger than the pitch of connection pads on chips through the major portion of the body of an MLM device. Similarly, the connection pads to which pins may be later attached for connecting the module to a circuit board, another substrate or the like may be at a different pitch (either larger or smaller) or pattern than vias and conductors carrying power and signals within the substrate. Accordingly, it is customary to provide a plurality of additional layers or lamina, generally of a polyimide thin film construction, on the top and bottom surfaces of the multi-layer module substrate (e.g. a multi-layer ceramic portion in multi-layer ceramic (MLC) packages) principally to provide alteration of connection pad spacing or pattern, sometimes in plural stages. Such layers are generally referred to as "distribution" or "redistribution" layers.
The complexity of MLMs makes provision for testing and repair (referred to as engineering changes (ECs)) during manufacture very desirable since the patterns on the lamina and via filling is generally accomplished by relatively expensive individual screening processes. While connections and connection pads are very dense, small and closely spaced, it is usually possible to provide redundant connection structures which are accessible by mechanical automated repair apparatus as part of the design. Thus, repair of marginal or defective connections can avoid loss of the economic cost of manufacturing processes prior to testing when a marginal or defective connection is found. Conversely, detection of a module substrate which cannot be repaired allows the cost of further processing of a substrate which must eventually be discarded to be avoided.
In recent years, however, the performance of integrated circuit chips has advanced to the point where connections through the distribution layers to the major (substrate) portion of the MLM package (where complex interconnections are generally formed) may be of excessive length for numerous critical signal paths. Therefore, it has become the practice to include connections for at least some of such critical signal paths within the distribution layers rather than the substrate in order to shorten the required connections. Connection patterns in the distribution layers have thus become markedly more complex and more densely populated with conductors. Testing of these more complex layers, particularly at points during manufacture when repair is most likely to be possible, has become correspondingly more intricate and stringent. Increased numbers of thin film distribution layers increases the required number of tests, as well.
It is desirable, during such testing, to test the entirety of the modular device assembled up to the point of the test. That is, all wiring or connection layers which have been assembled up to the point of the test should be tested together. Such tests should be run at intervals of no more than a few lamina (and preferably at each thin film lamina level) so that engineering changes can be made most simply or, if not possible to correct the condition of the structure, so that few, if any, further process steps will be carried out on a structure beyond the processing which produced the irreparable defect.
From the accommodation of multiple chips and the nominal dimensions of the modular package structure alluded to above, it can be understood that a much larger area must meet functional requirements than is involved on a single chip. To test the functionality of the device over such an area, connections must be made to the so-called voltage plane or bottom surface metallurgy (BSM) pads which will eventually receive the pins to attach the module to the device in which it will be placed in service. One of these tests is a so-called voltage plane test which is principally directed to determining if certain extensive connections running throughout the substrate and distribution layers are shorted to each other or to other connections.
Generally, it is desirable that the testing of modular package structures be performed without removing the module from the manufacturing line (and thus is referred to as "in-line" testing) to preserve alignment within automated manufacturing devices and to avoid incidental damage and contamination due to additional handling of partially completed packages. In-line testing also preserves potential throughput of the manufacturing line even when numerous tests must be done at a number of points in the manufacturing process since only the time of the test, itself, is required and interference with the manufacturing line to remove and re-insert structures is avoided. Voltage plane tests are among a series of standard tests which are preferably performed as in-line tests.
It should be appreciated, in this regard, that while connections may also be made to the top surface connections (referred to as top side metallurgy) of the module being manufactured for a single particular test or test series, additional lamina may later be placed thereon and any damage to the conductive pattern due to the connection to top surface metallurgy (TSM) patterns occasioned by the test may generally be repaired. In contrast, temporary connections must be repeatedly made to the BSM pads for a plurality of tests and, for that reason, at the current state of the art, the BSM pads remain exposed through the further lamination and chip attachment TSM processes. Either the repeated formation of temporary connections for testing or the exposure during manufacturing processes or a combination thereof often results in mechanical and/or chemical damage to and/or contamination of the BSM pads reducing yield or requiring rework during subsequent pin attachment (e.g. brazing) processes. Damage to the connection pads may also compromise tests which may be performed as the package structure nears completion and unnecessarily further reduce manufacturing yield after most of the cost of completion of the package has been incurred.
While BSM connection pads could theoretically be covered during TSM lamina processing steps, any such covering must be removed, opened or pierced prior to or as part of further testing. Placement and removal of such a covering or portions thereof can also be a source of damage to the BSM connection pads. Further, covering of the pads during processing for addition of distribution layers does not address the issue of damage to BSM pads due to repeated formation of temporary connections for testing. In this regard, the metallurgy of BSM pads can not generally be altered to make them more chemically and/or mechanically durable during manufacture and testing incident thereto without compromising the pin attachment process. Provision of redundant pads within the array of BSM pads is inconvenient in regard to development of convenient and desirable connection pin configurations and occupies module connection pad space while necessarily preventing minimization of connection length and would require additional redundant wiring within the MLM which would occupy valuable wiring area, locations and volume.
Formation of redundant connections for engineering changes alluded to above generally includes the formation of so-called EC or dog-bone pads on the surface of the package structure (at appropriate points during the manufacturing process) which are at intermediate locations along many conductors in the design, including redundant conductors and which are accessible when repairs may be needed and performed. Such EC pads are essentially a pair of pads placed close together and connected by a narrow strip of conductor. The pads are of a size which is accessible by automated connection forming machinery while the narrow conductor is dimensioned to be readily destroyed by laser ablation processes, mechanical cutting or the like, including fusing by application of high current.
Thus, potentially any portion of potentially any conductor and/or redundant conductor in the design can be isolated from the remainder of the conductor and new connections made such as to substitute a portion of any convenient redundant conductor. Nevertheless, it should be recognized that such formations as EC pads are intended only for the formation of permanent connections (as opposed to repeated, temporary connections of test pads) and then only as needed for repair of other connections in the module.
It is also known to provide test connections for individual chips on a wafer so that electrical properties of the individual chips can be determined prior to dicing of the wafer into such individual chips. However, to avoid increasing required chip space, such test connections are generally made in the kerf areas of the wafer which will be consumed by the dicing process. Therefore, test connections do not ordinarily exist at the individual chip or package level. Further, processing of and connections to wafers involve only a single side of the wafer; specific areas of which can generally be masked and opened as may be necessary. Accordingly, chemical and mechanical damage and contamination of connections during processing does not generally present a problem since a covering layer may be readily applied and removed without damage to metallization. In any event, testing prior to completion or dicing of a chip is generally limited to screening for process-related defects at the wafer level. Additionally, at the individual chip level, temporary test connections are not generally made to the chip itself but rather are made to lead frames, solder preforms or bumps or the like which are permanently connected to contact pads on the chip.
Additionally, it is often desirable to perform other types of tests such as metallurgical or adhesion tests on connection pads. However, pads which are needed for mounting of pins and connections to the circuit package would necessarily be damaged by metallurgical and mechanical tests since such tests, by their nature, generally involve the application of potentially destructive forces or the removal of material. Tests on other structures such as metallization specifically provided for such testing may not provide reliable information since their function as connectors is not testable because they are not generally connected to the circuitry of the package and processing differences, such as heat exposure during pin brazing, may affect the properties being tested.
It is also becoming more desirable to provide for diagnostic testing of an installed electronic circuit package as package complexity increases since increased complexity is generally reflected in the number of connection pins on the package. An increased number of connection pins increases the potential for damage to one or more pins or the package itself during removal of the package from a device in which it is installed, connection to and/or disconnection from a tester and reinsertion into the device. Increased integration density allows some diagnostic circuitry to be placed in the package, if desired, but pin locations to extract signals from the package are often not available and cannot be efficiently provided in any event since the anticipated low frequency of such testing does not justify the package space required or the manufacturing costs of adding dedicated pins on the package.
In summary, no alternative has been available in the art to avoid exposure of BSM pads during MLM package manufacture consistent with avoidance or limitation of damage to BSM pads and compromise of pin attachment processes while permitting repeated in-line testing at points in the manufacturing process and/or line at which repairs may be most readily carried out. Additionally, the current trend toward increased complexity of connections and number of lamina used in TSM thin film distribution layers and testing incident to its manufacture and rework increases the potential for damage and/or contamination of BSM pads in modern MLM and MLC packages as well as their cost of manufacture which is put at risk by such damage or contamination. Further, no alternative has existed for avoiding provision of separate structures for electrical, mechanical and chemical/metallurgical testing or for testing the package after it is placed in service.